Key facts
- Brand
- Analog Devices
- Model
- ADSP-2106X
- Industry
- Industrial
- Documents
- 15
- Languages
- EN · ZH
- Last added
- 2012-08-03
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Analog Devices ADSP-2106x SHARC Processor User Manual
This manual introduces the ADSP-2106x SHARC® processor family, describing its core architecture, computation units, program sequencing, data addressing, and memory organization. It includes chapters on DMA controller features, multiprocessing architectures, host interface timing, and link‑port operation.
The document also covers development tools, booting options, clock specifications, and programming considerations such as floating‑point operations, register usage, and interrupt handling, offering engineers the technical details needed to design and program systems based on the ADSP-2106x.
Analog Devices ADSP-2106X specifications
| Critical Voltage (5V parts) | approximately 2.5 Volts |
|---|---|
| Critical Voltage (3.3V parts) | approximately 1.3 Volts |
| Decoupling Capacitor Value | .1 µF |
| Series Termination Resistor Range | 20-100 ohms |
Source: Analog Devices Serial Port Development and Troubleshooting Guide
All Analog Devices ADSP-2106X documents by type
Day-to-day operation, settings and troubleshooting. Start here if the product is already set up.
How to use the product for one specific task, with worked examples.
- Analog Devices Serial Port Development and Troubleshooting Guide 20 p
- EE-166 ADSP-2106x EPROM Overlay Support with VisualDSP++ 2.0 11 p
- ANALOG DEVICES EE-160 Examining ADSP-21160 Link Port Backward Compatibility to the ADSP-2106x Link Ports Manual 11 p
- Analog Devices ADSP-2106x Using SPORTs as Timers 1 p
- Analog Devices EE-85 Recommended Handling of Unused SHARC Pins 2 p
- Analog Devices EE-70 ADSP-2106x SPORT DTx Pin Contention Analysis 2 p
- Analog Devices EE-069 Understanding and Using Linker Description Files on SHARC Processors Application Note 7 p
- Analog Devices EE-47 ADSP-2106x Link Ports Maximum Throughput Application Note 3 p
- Analog Devices EE-42 C Programming Application Note for ADSP-2106x 4 p
- Analog Devices EE-189 Link Port Tips for ADSP-2106x & ADSP-2116x 6 p
- Analog Devices EE-280 In-Circuit Flash Programming on ADSP-2106x SHARC Processors 8 p
- Analog Devices SHARC EPROM and Host Boot Loader Tips and Tricks 15 p
- Analog Devices External Port DMA Modes of Operation for SHARC Processors EE-84 7 p
- Analog Devices ADSP2106X Radar Parallel Signal Processing System Application Note 4 p
Questions answered in these manuals
What causes shifted data in serial communication?
Shifted data usually indicates a data synchronization problem, often caused by a noisy serial clock or system noise when transmitting unframed data.
From: Analog Devices Serial Port Development and Troubleshooting Guide
What causes incorrect bits in received serial data?
Incorrect bits in received serial data are usually caused by a system noise problem.
From: Analog Devices Serial Port Development and Troubleshooting Guide
What tools are used for this configuration?
The document discusses using VisualDSP++ 2.0, noting that the shipped tools require a modified kernel to handle EPROM overlays.
From: EE-166 ADSP-2106x EPROM Overlay Support with VisualDSP++ 2.0
How many words of memory does the processor load after reset?
The core processor loads 256 words into internal memory before starting execution.
From: EE-166 ADSP-2106x EPROM Overlay Support with VisualDSP++ 2.0
Are ADSP-21160 link ports compatible with ADSP-2106x link ports?
Yes, they are logically compatible, though only an ADSP-2106xL is electrically compatible without a voltage conversion stage.
What registers control link port operations?
The SYSCON, LCOM, LAR, and LCTLx registers control the link ports operating modes for the I/O processor.