This document describes how to use ADSP-21060/2/1 SPORTs to implement additional timers.
This document describes a method to utilize unused Serial Port (SPORT) channels on the ADSP-21060/2/1 devices to function as additional timers, supplementing the single built-in timer. It explains that because the transmit and receive units have independent bit rate generators and interrupt logic, up to four additional timers can be realized.
| Number of additional timers | up to four |
|---|---|
| Timer registers | Two 16-Bit registers |
| Maximum timer period | around 85 seconds |
| Serial word length range | 3 up to 32 bits |
Up to four additional timers can be realized because the transmit and receive units have separate and independent bit rate generators and interrupt logic.
The timer period is controlled by two 16-Bit registers named xCLKDIV and xFSDIV.
The interrupt rate is calculated using the formula: fCLKIN / ((xCLKDIV + 1) * (xFSDIV + 1)).