Key facts
- Brand
- Analog Devices
- Model
- ADSP-TS20x
- Category
- Other Electronics
- Documents
- 2
- Languages
- EN
- Last added
- 2012-08-03
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Analog Devices EE-201 ADSP-TS20x TigerSHARC Processor On-Chip SDRAM Controller Technical Notes
This Engineer-to-Engineer Note introduces the characteristics of the on-chip SDRAM controller found in the ADSP-TS20x TigerSHARC processor family. Although primarily based on the ADSP-TS201, it provides a list highlighting differences between derivatives such as the ADSP-TS202 and ADSP-TS203.
The document details the internal signal chain, address-mapping schemes, command truth tables for SDRAM execution, and power-up sequences. It also includes timing overviews, supported SDRAM device types, register descriptions (SYSCON, SDRCON), and optimization rules for performance.
Analog Devices ADSP-TS20x specifications
| Maximum External Clock Frequency | 125 MHz |
|---|---|
| Processor Output FIFO Depth | six-stage |
| Maximum Addressable Rows (64-bit bus) | 8192 rows |
| Maximum Addressable Rows (32-bit bus) | 16384 rows |
| Supported SDRAM Voltage Levels | LVTTL (3.3V) and mobile low-power (2.5V) |
Source: Analog Devices EE-201 ADSP-TS20x TigerSHARC Processor On-Chip SDRAM Controller Technical Notes
All Analog Devices ADSP-TS20x documents by type
How to use the product for one specific task, with worked examples.
Questions answered in these manuals
Which TigerSHARC processor family derivatives are covered?
The document is based on the ADSP-TS201 but highlights differences for the ADSP-TS202 and ADSP-TS203.
From: Analog Devices EE-201 ADSP-TS20x TigerSHARC Processor On-Chip SDRAM Controller Technical Notes
Does the controller support Power-down or Suspend modes?
No, neither Power-down nor Suspend modes are supported by this controller.
From: Analog Devices EE-201 ADSP-TS20x TigerSHARC Processor On-Chip SDRAM Controller Technical Notes
What are the power supply domains for the ADSP-TS20xS?
The processor has four power supply domains: VDD (Internal), VDD_A (Analog PLL), VDD_IO (External I/O), and VDD_DRAM (DRAM).
From: Analog Devices ADSP-TS20xS TigerSHARC System Design Guidelines
Are there specific power sequencing requirements?
There are no specific power sequencing requirements other than the VDD_DRAM voltage must occur last.
From: Analog Devices ADSP-TS20xS TigerSHARC System Design Guidelines