Key facts
- Brand
- Analog Devices
- Model
- ADSP-BF536
- Industry
- Industrial
- Documents
- 4
- Languages
- EN
- Last added
- 2012-08-03
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Analog Devices EE-315 Changing the PHY in the Ethernet Driver for Blackfin Processors
This Engineer-to-Engineer Note describes the procedure for achieving networking functionality with ADSP-BF536/ADSP-BF537 Blackfin processors using MII-compatible Ethernet Physical Layer Transceivers (PHYs) other than the SMSC LAN83C185. The guide is based on the VisualDSP++ 4.5 development tool suite and its Ethernet MAC driver.
The document details the specific modifications required in the ADI_ETHER_BF537.c source code to accommodate different PHYs. Key changes involve updating the PHY address, clock settings, duplex capabilities, and auto-negotiation parameters. It also covers modifying the PHY ID check logic and interrupt handling routines to ensure compatibility with alternative devices like the SMSC LAN8187 or National Semiconductor DP83848.
Analog Devices ADSP-BF536 specifications
| Core frequency | Up to 600 MHz |
|---|---|
| MAC units | Two 16‑Bit MACs |
| ALU units | Two 40‑Bit ALUs |
| Core voltage range | 0.8 V to 1.2 V |
| I/O voltage tolerance | 2.5 V and 3.3 V‑tolerant I/O, specific 5 V‑tolerant pins |
| Package options | 182‑Ball MBGA and 208‑Ball Sparse MBGA |
| On‑chip memory | Up to 132 KB total (16 KB instruction SRAM/cache, 48 KB instruction SRAM, 32 KB data SRAM/cache, 4 KB scratchpad) |
| External memory support | Up to 516 MB external memory |
All Analog Devices ADSP-BF536 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
How to use the product for one specific task, with worked examples.
Instruction set, parameters and examples for configuring or programming the device.
Questions answered in these manuals
Which PHYs are supported besides the default SMSC LAN83C185?
The work was verified on an SMSC LAN8187 and on a National Semiconductor DP83848.
From: Analog Devices EE-315 Changing the PHY in the Ethernet Driver for Blackfin Processors
What development tool is required for this modification?
The procedure is based on the VisualDSP++ 4.5 development tool suite and its Ethernet MAC driver.
From: Analog Devices EE-315 Changing the PHY in the Ethernet Driver for Blackfin Processors
What is the maximum operating frequency of the ADSP-BF536/ADSP-BF537?
The processors can run at up to 600 MHz.
How much on‑chip SRAM is available for instructions?
The device provides 16 KB of instruction SRAM/cache and 48 KB of instruction SRAM.
Which models include an Ethernet MAC?
Only the ADSP‑BF536 and ADSP‑BF537 have an IEEE 802.3‑compliant 10/100 Ethernet MAC.
From: Analog Devices ADSP-BF534/ADSP-BF536/ADSP-BF537 Programming Manual
How many general‑purpose I/O pins are available?
The processors provide 48 general‑purpose I/Os, of which 8 have high‑current drivers.
From: Analog Devices ADSP-BF534/ADSP-BF536/ADSP-BF537 Programming Manual