Analog Devices ADSP-BF534/ADSP-BF536/ADSP-BF537 Programming Manual

Blackfin is a registered trademark of Analog Devices, and ADSP-BF534/ADSP-BF536/ADSP-BF537 are the model numbers of Blackfin embedded processors. This document introduces the features and characteristics of ADSP-BF534/ADSP-BF536/ADSP-BF537, including 600 MHz high-performance processor, two 16-bit MAC, two 40-bit ALU, four 8-bit video ALU, 40-bit shifter, RISC-like register and instruction model, advanced debug, trace, and performance monitoring, 0.8 V to 1.2 V core voltage, 2.5 V and 3.3 V compatible I/O, 182-ball and 208-ball MBGA packages.


Analog Devices ADSP-BF534/ADSP-BF536/ADSP-BF537 Programming Manual - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Programming Manual
Language
English
Pages
68
File format
PDF
File size
2.4 MB
Published
04 June, 2012
Updated
30 September, 2023
MD5 checksum
C2436EE31ECBEE4F0414FC14F23F2F59

About this manual

The handbook describes the ADSP-BF534, ADSP-BF536 and ADSP-BF537 Blackfin embedded processors, members of the Blackfin family that combine dual‑MAC DSP engines with a RISC‑like core. It outlines the high‑performance features such as up to 600 MHz operation, on‑chip voltage regulation, and a rich set of peripherals including Ethernet, CAN, SPI, UART, and multiple timers.

The document also details the memory hierarchy (up to 132 KB on‑chip memory, L1 instruction and data SRAM/cache, scratchpad SRAM), external memory interfaces (SDRAM, asynchronous memories), event handling, interrupt architecture, and power‑management capabilities. Technical tables, block diagrams, and pin‑out information support developers in designing and debugging systems based on these processors.

What's inside

  • General Description
  • Portable Low Power Architecture
  • System Integration
  • Blackfin Processor Peripherals
  • Blackfin Processor Core
  • Memory Architecture
  • Memory Map
  • Booting
  • Event Handling
  • Core Event Controller

Specifications

Maximum core frequencyUp to 600 MHz
MAC unitsTwo 16‑bit MACs
ALU unitsTwo 40‑bit ALUs, four 8‑bit video ALUs
Core shifter40‑bit shifter
On‑chip voltage regulator range0.8 V to 1.2 V core Vpp
I/O voltage levels2.5 V and 3.3 V‑compliant I/O, some pins 5 V‑tolerant
Package options182‑ball MBGA, 208‑ball Sparse MBGA
General‑purpose I/Os48 GPIOs (8 high‑current drivers)
TimersEight 32‑bit timers with PWM support
Ethernet MACIEEE 802.3‑compliant 10/100 (BF536/BF537 only)

Frequently asked questions

Which models include an Ethernet MAC?

Only the ADSP‑BF536 and ADSP‑BF537 have an IEEE 802.3‑compliant 10/100 Ethernet MAC.

How many general‑purpose I/O pins are available?

The processors provide 48 general‑purpose I/Os, of which 8 have high‑current drivers.

What voltage range does the on‑chip regulator support?

The on‑chip voltage regulator can supply core voltages from 0.8 V to 1.2 V.

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