Key facts
- Brand
- Texas Instruments
- Model
- CDC5801
- Industry
- Industrial
- Documents
- 3
- Languages
- EN
- Last added
- 2012-08-01
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DatasheetTEXAS INSTRUMENTS CDC5801 LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH PROGRAMMABLE DELAY AND PHASE ALIGNMENT handbook
TEXAS INSTRUMENTS CDC5801 LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH PROGRAMMABLE DELAY AND PHASE ALIGNMENT handbook
Datasheet
cdc5801 is a low jitter clock multiplier and divider with programmable delay and phase alignment, supporting x4, x6, x8 multiplication, supporting input frequency from 19mhz to 125mhz, output frequency from 150mhz to 500mhz.
Read onlineAll Texas Instruments CDC5801 documents by type
Datasheet 2
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
How is the programmable delay set on the CDC5801?
Each rising edge on the DLYCTRL terminal advances or delays the output by a 2.6‑mUI step (1/384 of the output period).
From: Texas Instruments CDC5801 Low Jitter Clock Multiplier and Divider Datasheet
What is the typical phase jitter at 500 MHz?
At 500 MHz the accumulated phase jitter is about 8 ps (measured from 50 kHz to 80 MHz).
From: Texas Instruments CDC5801 Low Jitter Clock Multiplier and Divider Datasheet