Key facts
- Brand
- Texas Instruments
- Model
- TSB41BA3
- Category
- Other
- Industry
- Electronics
- Documents
- 2
- Languages
- EN
- Last added
- 2012-05-07
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Texas Instruments TSB41BA3/A Errata Manual
The document describes a $100B port failed‑connection issue on the TSB41BA3/A, where the port may not establish an active link after power‑up. The cause is identified as improper reset of the transmit clock circuitry, leading to an invalid frequency for S100B connections. Several software and hardware workarounds are provided, such as changing the device mode to S400B, using the CSEL bit in the page‑7 register, and performing hard resets.
A second issue, "Disappearing IDLE in a Beta system," can cause arbitration time‑outs and bus resets in systems with multiple cable hops. The recommended hardware workaround is to add a 1394A PHY to enforce legacy gap timing. The manual concludes with legal notices and warranty information from Texas Instruments.
All Texas Instruments TSB41BA3 documents by type
Disassembly, diagnostics and part numbers, for repair.
How to use the product for one specific task, with worked examples.
Questions answered in these manuals
What causes the $100B port failed connection issue on the TSB41BA3/A?
The transmit clock circuitry is not properly reset at power‑up, allowing it to initialize into an invalid state that generates an incorrect frequency for S100B connections.
What hardware workaround resolves the disappearing IDLE issue?
Add a 1394A PHY to the system to force legacy gap timing on the 1394 bus.
What issue does the TSB41BA3B errata address?
It addresses a disappearing IDLE in a Beta system that results in max arbitration state timeout and bus reset.
What is the recommended workaround for the disappearing IDLE issue?
Add a 1394A PHY to the system to force legacy gap timing on the 1394 bus.