Key facts
- Brand
- Texas Instruments
- Model
- XIO1100
- Category
- Other Electronics
- Documents
- 2
- Languages
- EN
- Last added
- 2012-06-08
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Texas Instruments XIO1100 PCI Express PHY Datasheet
The XIO1100 is a PCI Express Physical Layer (PHY) device that interfaces between the Media Access Control (MAC) layer and the serial link. It supports both 16-bit Single Data Rate (SDR) and 8-bit Double Data Rate (DDR) modes via a configurable TI-PIPE interface.
The device handles 8B/10B encoding, decoding, scrambling, and unscrambling of data. It features selectable reference clocks for transmit and receive operations and includes power management capabilities to support low-power states.
Texas Instruments XIO1100 specifications
| PCI Express Compliance | 1.1 Compliant |
|---|---|
| Interface Modes | 16-bit SDR or 8-bit DDR |
| Clock Frequencies | 100 MHz, 125 MHz |
| Package Type | 100-Pin MicroStar BGA |
| Operating Voltage | 3.3/1.8/1.5 V |
All Texas Instruments XIO1100 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the TI-PIPE interface?
It is a modified version of the Intel PIPE interface used by the XIO1100 to connect the MAC to the serial link.
What is the XIO1100?
The XIO1100 is a PCI Express PHY that interfaces the Media Access Layer to a PCI Express serial link.
What are the target markets for the XIO2000A?
Target markets include desktop and mobile PC, server, storage, PC add-in cards, and embedded systems.
From: Texas Instruments XIO2000A/XIO2200A/XIO3130/XIO1100/PCIE412 PCI Express Solutions Datasheet
Is the XIO3130 compliant with PCI Express Base Specification Revision 1.1?
Yes, it is fully compliant with PCI Express Base Specification, Revision 1.1.
From: Texas Instruments XIO2000A/XIO2200A/XIO3130/XIO1100/PCIE412 PCI Express Solutions Datasheet