Key facts
- Brand
- Texas Instruments
- Model
- CD4027B
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-06-08
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Texas Instruments CD4027B CMOS Dual J-K Master-Slave Flip-Flop Datasheet
The CD4027B is a monolithic integrated circuit containing two identical complementary-symmetry J-K master-slave flip-flops. It features provisions for individual J, K, Set, Reset, and Clock input signals, with buffered Q and Q outputs. The device operates at high voltage levels up to 20V and supports medium-speed operation with a typical clock toggle rate of 16 MHz.
Read onlineAll Texas Instruments CD4027B documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the maximum supply voltage rating?
The device has a high-voltage rating of up to +20V.
From: Texas Instruments CD4027B CMOS Dual J-K Master-Slave Flip-Flop Datasheet
How many flip-flops are contained in the chip?
It contains two identical complementary-symmetry J-K master-slave flip-flops.
From: Texas Instruments CD4027B CMOS Dual J-K Master-Slave Flip-Flop Datasheet
What package options are available for the CD4027B?
The CD4027B is offered in PDIP, SOIC, TSSOP, and NS (narrow‑strip) packages, each in 16‑lead configurations.
What is the recommended operating temperature range?
The device is rated for operation from –55 °C to +125 °C.
