cdc5801 is a low jitter clock multiplier/divider that supports a frequency range of 12.5-500mhz with a single-ended input and a differential output. the output can drive LVPECL, LVDS, and LVTTL signals.
The CDC5801 is a low‑jitter clock multiplier and divider that can multiply by 4, 6, or 8 and divide by 2, 3, or 4. It supports programmable delay steps of 2.6 mUI and phase‑alignment functionality, allowing precise timing adjustments for video graphics, gaming, and other high‑speed applications.
The device operates from a single‑ended reference clock (19 MHz – 125 MHz) and delivers differential outputs from 12.5 MHz up to 500 MHz. It features low power consumption (typical 200 mW at 500 MHz) and operates over a temperature range of –40 °C to 85 °C. Package options include a 24‑pin DBQ package.