Key facts
- Brand
- Texas Instruments
- Model
- CDC2516
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-08-01
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Texas Instruments CDC2516 3.3-V Phase-Lock Loop Clock Driver Datasheet
The CDC2516 is a high-performance, low-skew, low-jitter phase-locked loop (PLL) clock driver specifically designed for use with synchronous DRAMs. It distributes one clock input to four banks of four outputs, providing 16 low-skew copies of the input clock. Each output bank can be enabled or disabled separately via control inputs.
Read onlineTexas Instruments CDC2516 specifications
| Supply Voltage | 3.0 V to 3.6 V |
|---|---|
| Operating Temperature | 0°C to 70°C |
| Clock Frequency | 25 MHz to 125 MHz |
| Output Current (High) | 12 mA |
| Output Current (Low) | 12 mA |
| Package Type | 48-Pin Thin Shrink Small-Outline Package |
Source: Texas Instruments CDC2516 3.3-V Phase-Lock Loop Clock Driver Datasheet
All Texas Instruments CDC2516 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the stabilization time for the CDC2516?
The stabilization time required for the integrated PLL circuit to obtain phase lock is 7 ms.
From: Texas Instruments CDC2516 3.3-V Phase-Lock Loop Clock Driver Datasheet
How many clock outputs does the CDC2516 provide?
The device provides four banks of four outputs, totaling 16 low-skew copies of the input clock.
From: Texas Instruments CDC2516 3.3-V Phase-Lock Loop Clock Driver Datasheet
Does the CDC2516 require external RC networks?
No, unlike many products containing PLLs, the CDC2516 does not require external RC networks because its loop filter is included on-chip.
From: Texas Instruments CDC2516 Phase-Lock Loop Clock Driver Datasheet
What is the supply voltage requirement?
The device operates at a 3.3-V Voc with a recommended range of 3 V to 3.6 V.
From: Texas Instruments CDC2516 Phase-Lock Loop Clock Driver Datasheet