Key facts
- Brand
- Philips
- Model
- HCT595
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-06-12
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PHILIPS 74HC/HCT595 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state handbook
The 74HC/HCT595 is a high-speed Si-gate CMOS device that is pin compatible with low power Schottky TTL (LSTTL). It functions as an 8-stage serial shift register with a storage register and 3-state outputs, specified in compliance with JEDEC standard no. 7A. The device features separate clocks for the shift and storage registers, allowing data to be shifted on the positive-going transitions of the SH CP input and transferred to the storage register on the ST CP input. It includes an asynchronous reset (active LOW) for all 8 shift register stages and 8 parallel 3-state bus driver outputs controlled by an output enable input.
Read onlinePhilips HCT595 specifications
| Shift register stages | 8-stage |
|---|---|
| Maximum clock frequency (HC) | 100 MHz |
| Output capability | Parallel outputs; bus driver; serial output; standard |
All Philips HCT595 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
How is data transferred from the shift register to the storage register?
Data is transferred to the storage register on a positive-going transition of the ST CP input.
What happens when the OE input is HIGH?
When the output enable input is HIGH, the parallel outputs enter a high-impedance OFF-state.