Key facts
- Brand
- Philips
- Model
- HCT109
- Category
- Chips
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-07-02
Start here
Philips 74HC/HCT109 Dual JK Flip-Flop Datasheet
Datasheet 9 pages · 68 KB · EN
The Philips 74HC/HCT109 is a high-speed Si-gate CMOS device featuring dual positive-edge triggered JK flip-flops with individual J, K, clock, set, and reset inputs. These devices are pin compatible with low power Schottky TTL (LSTTL) and comply with JEDEC standard no. 7A.
Read onlinePhilips HCT109 specifications
| Output capability | standard |
|---|---|
| Maximum clock frequency (HC) | 75 MHz |
| Input capacitance | 3.5 pF |
| Propagation delay (HCT) | 20 ns |
All Philips HCT109 documents by type
Datasheet 2
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the trigger type of the 74HC/HCT109?
The device features dual positive-edge triggered JK flip-flops.
Are the set and reset inputs synchronous or asynchronous?
The set and reset inputs are asynchronous and active LOW.
What is the trigger type of the 74HC/HCT109?
The device is a dual positive-edge triggered JK flip-flop.
Are the set and reset inputs synchronous or asynchronous?
The set and reset inputs are asynchronous and active LOW.