Key facts
- Brand
- Philips
- Model
- HCT112
- Category
- Chips
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-07-02
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Philips 74HC/HCT112 Dual JK Flip-Flop Datasheet
Datasheet 15 pages · 111 KB · EN
The document describes the 74HC/HCT112 as high-speed Si-gate CMOS devices that are pin compatible with low power Schottky TTL (LSTTL). These integrated circuits feature asynchronous set and reset capabilities, standard output capability, and negative-edge triggering on the clock input.
Read onlinePhilips HCT112 specifications
| Device Type | Dual JK flip-flop with set and reset; negative-edge trigger |
|---|---|
| Technology | High-speed Si-gate CMOS |
| TTL Compatibility | Pin compatible with LSTTL |
| Maximum Clock Frequency (74HC) | 66 MHz |
| Operating Temperature Range (74HC) | -40 to +85 °C / -40 to +125 °C |
| Operating Temperature Range (74HCT) | -40 to +85 °C / -40 to +125 °C |
All Philips HCT112 documents by type
Datasheet 2
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the trigger type for the 74HC/HCT112?
The device features negative-edge triggering on the clock input.
Do the set and reset inputs require a specific logic level to activate?
Yes, both the set (nSp) and reset (nRp) inputs are active LOW.
What is the trigger type for the 74HC/HCT112?
The device features negative-edge triggering.
Are the set and reset inputs active high or low?
Both the set (nSp) and reset (nRp) inputs are active LOW.
