Key facts
- Brand
- Philips
- Model
- HCT107
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-07-02
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Philips 74HC/HCT107 Dual JK Flip-Flop Datasheet
This document is a product specification datasheet for the Philips 74HC/HCT107, which are high-speed Si-gate CMOS devices. The integrated circuits are pin compatible with low power Schottky TTL (LSTTL) and comply with JEDEC standard no. 7A.
Read onlinePhilips HCT107 specifications
| Output capability | standard |
|---|---|
| Loc category | flip-flops |
| Supply voltage range (74HC) | -40 to +85 Vcc |
Source: Philips Semiconductors 74HC/HCT107 Dual JK Flip-Flop Datasheet
All Philips HCT107 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
How much load capacitance does each flip-flop have?
The input capacitance per flip-flop is 3.5 pF.
What voltage level activates the reset input?
The reset input is active at a LOW voltage level.
What type of flip-flop is the 74HC/HCT107?
It is a dual negative-edge triggered JK-type flip-flop.
From: Philips Semiconductors 74HC/HCT107 Dual JK Flip-Flop Datasheet
How does the reset input function?
The reset (nR) is an asynchronous active LOW input that overrides the clock and data inputs.
From: Philips Semiconductors 74HC/HCT107 Dual JK Flip-Flop Datasheet