PHILIPS 74ABT16823A Electronic component
User Manual
The 74ABT16823A 18-bit bus interface register is designed to
eliminate the extra packages required to buffer existing registers and
provide extra data width for wider data/address paths of buses
carrying parity.
The 74ABT16823A has two 9-bit wide buffered registers with Clock
Enable (nCE) and Master Reset (nMR) which are ideal for parity bus
interfacing in high microprogrammed systems.