STMicroelectronics STE100A Manuals

This document is about STE10/100A datasheet

The STE10/100 is a high performance PCI Fast Ethernet controller with integrated physical layer interface for 10BASE-T and 100BASE-TX applications. It was designed with advanced CMOS technology to provide a glueless 32-bit bus master interface for the PCI bus, boot ROM interface, CSMA/CD protocol for Fast Ethernet, as well as the physical media interface for 100BASE-TX of IEEE802.3u and 10BASE-T of IEEE802.3. The auto-negotiation function is also supported for speed and duplex detection. The STE10/100 provides both half-duplex and full-duplex operation, as well as support for full-duplex flow control. It provides long FIFO buffers for transmission and receiving, and early interrupt mechanism to enhance performance. The STE10/100 also supports ACPI and PCI compliant power management function.

This data sheet describes the features of STE10/100A PCI Fast Ethernet controller, including speed and duplex detection, half-duplex and full-duplex operation, full-duplex flow control, long FIFO buffers, early interrupt mechanism.