The STE10/100 is a high performance PCI Fast Ethernet controller with integrated physical layer interface for 10BASE-T and 100BASE-TX applications. It was designed with advanced CMOS technology to provide a glueless 32-bit bus master interface for the PCI bus, boot ROM interface, CSMA/CD protocol for Fast Ethernet, as well as the physical media interface for 100BASE-TX of IEEE802.3u and 10BASE-T of IEEE802.3. The auto-negotiation function is also supported for speed and duplex detection. The STE10/100 provides both half-duplex and full-duplex operation, as well as support for full-duplex flow control. It provides long FIFO buffers for transmission and receiving, and early interrupt mechanism to enhance performance. The STE10/100 also supports ACPI and PCI compliant power management function.
The STE10/100A is a high-performance PCI Fast Ethernet controller featuring an integrated physical layer interface for 10BASE-T and 100BASE-TX applications. Designed with advanced CMOS technology, it provides a glueless 32-bit bus master interface for the PCI bus and supports CSMA/CD protocol and auto-negotiation for speed and duplex detection.
The device includes independent transmission and receiving FIFOs, each 2k bytes long, and supports full-duplex flow control. It offers ACPI and PCI compliant power management functions and is available in a 128-pin QFP package. The datasheet covers industry standard compliance, FIFO operations, PCI interface details, EEPROM/Boot ROM interfaces, and physical layer specifications.
| Package Type | 128-pin QFP |
|---|---|
| Clock Frequency | 20MHz to 33MHz |
| FIFO Size | 2k bytes |
| Power Supply | 3.3V |
The STE10/100A is available in a 128-pin QFP package.
Yes, it supports auto-negotiation for speed and duplex detection.