This document is about STE10/100A datasheet
The STE10/100A is a high-performance PCI Fast Ethernet controller featuring an integrated physical layer interface for 10BASE-T and 100BASE-TX applications. Designed with advanced CMOS technology, it provides a glueless 32-bit bus master interface for the PCI bus and supports CSMA/CD protocols.
Key features include support for IEEE 802.3x flow control, auto-negotiation for speed and duplex detection, and both half-duplex and full-duplex operation. The device includes long FIFO buffers for transmission and receiving, early interrupt mechanisms to enhance performance, and compliance with ACPI and PCI power management standards.
| Interface | PCI Fast Ethernet controller with integrated PHY |
|---|---|
| Speed Support | 10BASE-T and 100BASE-TX |
| Voltage | 3.3V |
| Package | 128-pin QFP |
| Clock Frequency | 20-33 MHz |
| FIFO Size | 2k bytes |
| Boot ROM Size | up to 128kB |
The controller supports 10BASE-T and 100BASE-TX applications.
Yes, it supports auto-negotiation for speed and duplex detection.
The device operates at 3.3V.