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- STMicroelectronics
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- STM32W108C8
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- Industrial
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- Last added
- 2012-08-09
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STM32W108C8 High-Performance IEEE 802.15.4 Wireless SoC Datasheet
The STM32W108C8 is a high-performance, low-power system-on-chip (SoC) designed for IEEE 802.15.4 wireless applications. It integrates a 32-bit ARM Cortex-M3 processor with a 2.4GHz IEEE 802.15.4 transceiver and MAC, offering industry-leading RF performance and exceptional power efficiency. The device features 64-Kbyte Flash memory, 8-Kbyte RAM, and an AES128 encryption accelerator, making it suitable for secure wireless communication in remote controls and sensor networks.
Read onlineSTMicroelectronics STM32W108C8 specifications
| Processor | 32-bit ARM Cortex-M3 |
|---|---|
| Flash Memory | 64-Kbyte |
| RAM | 8-Kbyte |
| Transceiver | 2.4GHz IEEE 802.15.4 |
| Encryption | AES128 |
| GPIOs | 24 |
| Receive Current | 27 mA |
| Transmit Current | 31 mA |
| Deep Sleep Current | 400 nA / 800 nA |
| Link Budget | 102 dB |
| RX Sensitivity | -99 dBm |
| Output Power | +3 dBm |
| Package | VFQFPN48 (7x7 mm) |
| Operating Voltage | 2.1-3.6 V |
Source: STM32W108C8 High-Performance IEEE 802.15.4 Wireless SoC Datasheet
All STMicroelectronics STM32W108C8 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the main processor in the STM32W108C8?
The STM32W108C8 features a 32-bit ARM Cortex-M3 processor.
From: STM32W108C8 High-Performance IEEE 802.15.4 Wireless SoC Datasheet
What is the maximum link budget of the STM32W108C8?
The normal mode link budget is up to 102 dB, configurable up to 107 dB.
From: STM32W108C8 High-Performance IEEE 802.15.4 Wireless SoC Datasheet
What is the normal mode link budget of the STM32W108C8?
The normal mode link budget is up to 102 dB, configurable up to 107 dB.
From: STM32W108C8 Optimized IEEE802.15.4 System-on-Chip Data Brief
Does the STM32W108C8 support WiFi and Bluetooth coexistence?
Yes, it features robust WiFi and Bluetooth coexistence.
From: STM32W108C8 Optimized IEEE802.15.4 System-on-Chip Data Brief
