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- Philips
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- HCT393
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- Last added
- 2022-10-20
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Philips 74HC/HCT393 Dual 4-bit Binary Ripple Counter Datasheet
The 74HC/HCT393 are high-speed Si-gate CMOS devices containing two 4-bit binary counters with individual clocks. They feature separate master reset inputs for each counter and are specified in compliance with JEDEC standard no. 7A.
These devices operate as ripple counters triggered by a HIGH-to-LOW transition of the clock inputs, with outputs internally connected to provide clock inputs to succeeding stages. The counters can divide by any binary module up to 28 within a single package.
Philips HCT393 specifications
| Device Type | Dual 4-bit binary ripple counter |
|---|---|
| Technology | High-speed Si-gate CMOS |
| Clock Inputs | Two separate clocks (1 CP and 2 CP) |
| Reset Type | Master reset inputs (active HIGH) |
| Max Clock Frequency (HC) | 99 MHz |
| Max Clock Frequency (HCT) | 27 MHz |
| Supply Voltage Range (HC) | +25 V to +6.0 V |
| Supply Voltage Range (HCT) | +4.5 V |
Source: Philips 74HC/HCT393 Dual 4-bit Binary Ripple Counter Datasheet
All Philips HCT393 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
How are the counters triggered?
The counters are triggered by a HIGH-to-LOW transition of the clock inputs.
From: Philips 74HC/HCT393 Dual 4-bit Binary Ripple Counter Datasheet
What is the maximum divide-by count?
It can divide by any binary module up to 28 in one package.
From: Philips 74HC/HCT393 Dual 4-bit Binary Ripple Counter Datasheet
What is the function of the master reset inputs?
The master resets are active-HIGH asynchronous inputs that override the clock and set the outputs LOW.
From: Philips 74HC/HCT393 Dual 4-bit Binary Ripple Counter Datasheet
How are the counters triggered?
The counters are triggered by a HIGH-to-LOW transition of the clock inputs.
From: Philips 74HC/HCT393 Dual 4-bit Binary Ripple Counter Datasheet