Maxim 250MSPS Manuals

The MAX5878 is an advanced 16-bit, 250Msps, dual digital-to-analog converter (DAC) that meets the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications. Operating from +3.3V and +1.8V supplies, this dual DAC offers exceptional dynamic performance such as 76dBc spurious-free dynamic range (SFDR) at fOUT = 16MHz and supports update rates of 250Msps, with a power dissipation of only 296mW. The MAX5878 utilizes a current-steering architecture that supports a 2mA to 20mA full-scale output current range, and allows a 0.1VP-P to 1VP-P differential output voltage swing. The device features an integrated +1.2V bandgap reference and control amplifier to ensure high-accuracy and low-noise performance. A separate reference input (REFIO) allows for the use of an exter- nal reference source for optimum flexibility and improved gain accuracy. The clock inputs of the MAX5878 accept both LVDS and LVPECL-compatible voltage levels. The device fea- tures an interleaved data input that allows a single LVDS bus to support both DACs. The MAX5878 is avail- able in a 68-pin QFN package with an exposed paddle (EP) and is specified for the extended temperature range (-40°C to +85°C). Refer to the MAX5876 and MAX5877 data sheets for pin-compatible 12-bit and 14-bit versions of the MAX5878, respectively. Refer to the MAX5875 data sheet for a CMOS-compatible version of the MAX5878.

The MAX5876 is a high-performance 12-bit, 250Msps, dual-channel digital-to-analog converter (DAC) that meets the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications.

The MAX1124 is a monolithic 10-bit, 250Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies up to 500MHz. The product operates with conversion rates of up to 250Msps while consuming only 477mW. At 250Msps and an input frequency of 100MHz, the MAX1124 achieves a spurious-free dynamic range (SFDR) of 71dBc. Its excellent signal-to-noise ratio (SNR) of 57.1dB at 10MHz remains flat (within 1dB) for input tones up to 500MHz. This makes the MAX1124 ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems. The MAX1124 requires a single 1.8V supply. The analog input is designed for either differential or single-ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 500MHz. This helps to reduce the phase noise of the input clock source. A differential LVDS sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible, and the data format can be selected to be either two’s complement or offset binary. The MAX1124 is available in a 68-pin QFN with exposed pad (EP) and is specified over the industrial (-40°C to +85°C) temperature range. For pin-compatible, lower speed versions of the MAX1124, refer to the MAX1122 (170Msps) and the MAX1123 (210Msps) data sheets. For a pin-compatible 8-bit version,

MAX1121 is an 8-bit, 250Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies up to 500MHz.