Key facts
- Brand
- Texas Instruments
- Model
- SN54LS10
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-06-07
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TEXAS INSTRUMENTS SN5410 SN54LS10 SN54S10 SN7410 SN74LS10 SN74S10 handbook
This document provides technical data for the SN5410, SN54LS10, SN54S10, SN7410, SN74LS10, and SN74S10 series of triple 3-input positive-NAND gates. It details device status, packaging options, lead finishes, moisture sensitivity levels, and peak temperature ratings for various orderable devices.
Read onlineTexas Instruments SN54LS10 specifications
| High‑level input voltage (VIH) | 2 V |
|---|---|
| High‑level output current (IOH) | -0.4 mA |
| Low‑level output current (IOL) | 4 mA to 8 mA |
| Package types | J, D, N, W, FK, CDIP, CFP, SOIC, PDIP, LOCC |
Source: Texas Instruments SN5410 SN54LS10 SN54S10 Triple 3‑Input NAND Gate Datasheet
All Texas Instruments SN54LS10 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
Which package options are offered for the SN54LS10?
The SN54LS10 is available in J, D, N, W and FK packages, including CDIP, CFP, SOIC and PDIP variants.
From: Texas Instruments SN5410 SN54LS10 SN54S10 Triple 3‑Input NAND Gate Datasheet
