Analog Devices AD9517-1 Manuals

The AD9517-1 is a 12-output clock generator with an integrated 2.5 GHz VCO. The clock generator features a low phase noise, phase-locked loop (PLL). The AD9517-1 supports 1 differential or 2 single-ended reference inputs and has reference monitoring capability. In addition, the clock generator supports automatic revertive and manual reference switchover/holdover modes and accepts LVPECL, LVDS or CMOS references to 250 MHz. The AD9517-1 has a programmable delay path to the PFD and supports digital or analog lock detect. The clock generator has 2 pairs of 1.6 GHz LVPECL outputs, each output pair shares a 1:32 divider with coarse phase delay. Additive output jitter is 225 fs rms, channel-to-channel skew paired outputs are <10 ps. The AD9517-1 also has 2 pairs of 800 MHz LVDS clock outputs, each output pair shares two cascaded 1:32 dividers with coarse phase delay. Additive output jitter is 275 fs rms, fine delay adjust (Δt) is supported on each LVDS clock output.

AD9517-1 is a 12-output clock generator with integrated 2.5 GHz VCO

AD9517-1 is a 12-output clock generator with integrated 2.5 GHz VCO. It features low phase noise, phase-locked loop, and various input/output options, making it suitable for a wide range of applications.