Analog Devices ADUC7121 Manuals

ManualLib has 2 documents for the Analog Devices ADUC7121: 2 datasheets. Every file can be read online or downloaded as a PDF for free.

Datasheet 2

Key facts

Model
ADUC7121
Industry
Industrial
Documents
2
Languages
EN
Last added
2012-05-03

Start here

Analog Devices ADuC7121 Product Handbook Rev A

Analog Devices ADuC7121 Product Handbook Rev A

Datasheet 96 pages · 1.2 MB · EN

The ADuC7121 is a fully integrated 12‑bit microcontroller featuring a 9‑channel, 1 MSPS ADC, five current‑output DACs, four voltage‑output DACs, and an ARM7TDMI core with up to 41 MIPS performance. It operates from 3.0 V to 3.6 V and is specified for industrial temperatures from –10 °C to +95 °C.

The handbook provides detailed specifications, functional block diagrams, pin configurations, timing data, and information on the on‑chip peripherals such as UART, SPI, PWM, timers, and power‑supply monitoring. It also includes revision history, ordering guide, and package dimensions for the 108‑ball CSP‑BGA package.

Read online

Analog Devices ADUC7121 specifications

ADC resolution12 bits
ADC sampling rate1 MSPS
Flash memory126 kB
SRAM8 kB
Operating voltage3.0 V to 3.6 V
Temperature range-10 °C to +95 °C
IDAC0 full‑scale output250 mA
IDAC1 full‑scale output200 mA
IDAC2 full‑scale output45 mA
IDAC3 full‑scale output80 mA
IDAC4 full‑scale output20 mA
PLL frequency41.78 MHz

Source: Analog Devices ADuC7121 Product Handbook Rev A

All Analog Devices ADUC7121 documents by type

Datasheet 2

Ratings, dimensions and ordering codes, for selection and design work.

Application Note 1

How to use the product for one specific task, with worked examples.

Questions answered in these manuals

What is the ADC resolution of the ADuC7121?

The ADC provides a 12‑bit resolution.

From: Analog Devices ADuC7121 Product Handbook Rev A

What is the operating voltage range for the ADuC7121?

It operates from 3.0 V to 3.6 V.

From: Analog Devices ADuC7121 Product Handbook Rev A

What must be ensured for SPI clock pulses when the ADuC7121 is in slave mode?

The number of clock pulses from the master must be divisible by 8 while the chip‑select pin is low.

From: Analog Devices ADuC7121 Handbook

What occurs if the I²C slave interface is disabled while a transfer is in progress?

The ADuC7121 may drive the SDA pins low indefinitely until a hardware reset occurs.

From: Analog Devices ADuC7121 Handbook