ADuC7121 Silicon Anomaly Rev. 0 is a list of anomalies for the ADuC7121 chip released by Analog Devices. The list includes information such as functional issues, chip marking, problem descriptions, and repair methods.
The ADuC7121 handbook lists functionality issues discovered in revision C silicon, providing background, the specific issue, and recommended work‑arounds. It covers external interrupt handling, I²C slave interface behavior, and SPI slave mode timing requirements.
Each issue is presented in a table format with a brief description, status, and guidance for developers to avoid unexpected behavior in their applications.
| Silicon Revision | C |
|---|---|
| Number of External Interrupt Sources | 6 |
The number of clock pulses from the master must be divisible by 8 while the chip‑select pin is low.
The ADuC7121 may drive the SDA pins low indefinitely until a hardware reset occurs.