Key facts
- Brand
- Samsung
- Model
- K4S280832B
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-04-01
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Samsung K4S280832B CMOS SDRAM Datasheet
Datasheet 10 pages · 140 KB · EN
The K4S280832B is a 128‑Mbit synchronous CMOS SDRAM organized as 4M × 8 bits with four banks. It operates with a 3.3 V LVTTL interface and supports multiple burst lengths and CAS latency settings.
The document details absolute maximum ratings, recommended DC and AC operating conditions, pin‑out for the 54‑pin TSOP package, timing diagrams, IBIS models, and a simplified truth table for command encoding.
Samsung K4S280832B specifications
| Memory density | 128 Mbit |
|---|---|
| Organization | 4M × 8 bit × 4 banks |
| Supply voltage (typical) | 3.0 V – 3.6 V |
| Power dissipation | 1 W |
| Input voltage levels (AC test) | Vih = 2.4 V, Vil = 0.4 V |
| CAS latency options | 2 or 3 |
| Package pin pitch | 0.8 mm |
All Samsung K4S280832B documents by type
Datasheet 2
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the recommended supply voltage range for the K4S280832B?
The device is typically powered at 3.3 V, with a recommended range of 3.0 V to 3.6 V.
Which CAS latency values are supported?
The SDRAM can be configured for CAS latency of 2 or 3.
What is the recommended supply voltage for the K4S280832B?
The recommended supply voltage is 3.3 V, with a range of 3.0 V to 3.6 V.
What are the CAS latency options for this SDRAM?
The device supports CAS latency of 2 or 3 clock cycles.