Key facts
- Brand
- Intersil
- Model
- HSP9501
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-06-07
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Intersil HSP9501 Programmable Data Buffer Datasheet
The HSP9501 is a 10-bit wide programmable data buffer designed for high-speed digital systems. It supports two modes: delay mode for programmable pipeline delays (2 to 1281 clock cycles) and recirculate mode for circular buffering. The buffer length is controlled by an 11-bit Length Control Register, with values from 0 to 1279 resulting in delays from 2 to 1281. Clock select logic allows use of positive or negative edge clocks, and outputs are three-state for bus interfacing. It is suitable for video/image processing, sample rate conversion, and audio data handling.
The device operates from DC to 32MHz, features TTL-compatible I/O, and is low-power CMOS. Pin descriptions and functional timing are detailed, including control inputs for mode selection, clock edge selection, and length programming. Ordering information includes PLCC packages for temperature ranges from 0 to 70°C.
Intersil HSP9501 specifications
| Operating Frequency | DC to 32MHz |
|---|---|
| Buffer Length | 2 to 1281 words |
| Data Word Width | 10-Bits |
| Clock Edge Selection | Positive or Negative |
| Output Type | Three-State |
| Power Supply | +5V |
| Package Type | 44 Ld PLCC |
All Intersil HSP9501 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What clock edge options are available?
The HSP9501 supports both positive and negative edge system clocks via the CLKSEL input.
What is the HSP9501 designed for?
It is designed for use in high speed digital systems.
What are the two modes of operation for the HSP9501?
The device can operate in Delay mode or Data Recirculate mode, selected via the MODSEL input.
What is the maximum operating frequency of the HSP9501?
The device operates up to 32 MHz.