Key facts
- Brand
- STMicroelectronics
- Model
- STM8L16x
- Documents
- 2
- Languages
- EN
- Last added
- 2012-08-07
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STM8L16x AES Hardware Accelerator Application Note AN3270
The document describes the Advanced Encryption Standard (AES) hardware accelerator available in high-density STM8L16x devices. It details four specific modes of operation: encryption mode, decryption mode, key derivation mode, and a combined key derivation and decryption mode. The note explains that these operations are fully compliant with FIPS PUB 197.
Read onlineSTMicroelectronics STM8L16x specifications
| Encryption/Decryption clock cycles per 128-bit block | 892 clock cycles |
|---|---|
| Key derivation mode clock cycles | 320 clock cycles |
| Supported key length | 128-bit |
Source: STM8L16x AES Hardware Accelerator Application Note AN3270
All STMicroelectronics STM8L16x documents by type
How to use the product for one specific task, with worked examples.
Questions answered in these manuals
What is the purpose of the AES hardware accelerator in STM8L16x?
It off-loads the CPU from encryption/decryption tasks.
From: STM8L16x AES Hardware Accelerator Application Note AN3270
Which chaining modes are implemented in the supplied software?
ECB, CBC, CFB, OFB and CTR.
From: STM8L16x AES Hardware Accelerator Application Note AN3270
What microcontrollers does this application note cover?
It covers the real-time clock controller embedded in medium density STM8L15x and medium+ and high density STM8L15x/16x devices.
From: STMicroelectronics STM8L15x/STM8L16x Real-Time Clock Application Note AN3133
Does the RTC calendar support sub-seconds?
Yes, a sub-second field is available on medium+ and high density devices in binary format.
From: STMicroelectronics STM8L15x/STM8L16x Real-Time Clock Application Note AN3133