AN3270 STM8L16x AES hardware accelerator application note describes how to use STM8L16x's AES hardware accelerator and provides some implementations of common AES chaining modes.
The document describes the Advanced Encryption Standard (AES) hardware accelerator available in high-density STM8L16x devices. It details four specific modes of operation: encryption mode, decryption mode, key derivation mode, and a combined key derivation and decryption mode. The note explains that these operations are fully compliant with FIPS PUB 197.
| Encryption/Decryption clock cycles per 128-bit block | 892 clock cycles |
|---|---|
| Key derivation mode clock cycles | 320 clock cycles |
| Supported key length | 128-bit |
It off-loads the CPU from encryption/decryption tasks.
ECB, CBC, CFB, OFB and CTR.
Yes, it supports direct memory access using 2 channels.