Key facts
- Model
- DS90C032
- Category
- Other Electronics
- Documents
- 2
- Languages
- EN
- Last added
- 2012-07-04
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National Semiconductor DS90C032B Quad CMOS Differential Line Receiver Datasheet
The DS90C032B is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates, supporting speeds in excess of 155.5 Mbps using Low Voltage Differential Signaling (LVDS) technology. It accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels.
Read onlineNational Semiconductor DS90C032 specifications
| Data Rate | >155.5 Mbps (77.7 MHz) |
|---|---|
| Input Signal Level | 350 mV differential |
| Operating Temperature | Industrial range |
| Maximum Propagation Delay | 6.0 ns |
| Maximum Differential Skew | 600 ps |
Source: National Semiconductor DS90C032B Quad CMOS Differential Line Receiver Datasheet
All National Semiconductor DS90C032 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the maximum data rate supported?
The device supports data rates in excess of 155.5 Mbps (77.7 MHz).
From: National Semiconductor DS90C032B Quad CMOS Differential Line Receiver Datasheet
What input signal level does the receiver accept?
It accepts low voltage (350 mV) differential input signals.
From: National Semiconductor DS90C032B Quad CMOS Differential Line Receiver Datasheet
What is the maximum data rate of the DS90C032?
The device supports data rates in excess of 155.5 Mbps (77.7 MHz).
From: National Semiconductor DS90C032 LVDS Quad CMOS Differential Line Receiver Datasheet
What input voltage does the receiver accept?
It accepts low voltage (350 mV) differential input signals.
From: National Semiconductor DS90C032 LVDS Quad CMOS Differential Line Receiver Datasheet