Key facts
- Model
- ADC12D040
- Industry
- Industrial
- Documents
- 2
- Languages
- EN
- Last added
- 2012-06-06
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National Semiconductor ADC12D040 Dual 12-Bit 40 MSPS 600 mW A/D Converter with Internal/External Reference Sample-and-Hold handbook
The ADC12D040 is a low-power monolithic CMOS analog-to-digital converter featuring a differential pipelined architecture with digital error correction. It operates on a single +5V supply and includes an internal sample-and-hold circuit, minimizing die size while providing excellent dynamic performance.
Read onlineNational Semiconductor ADC12D040 specifications
| Resolution | 12 Bits (min) |
|---|---|
| Signal-to-Noise Ratio (10 MHz) | 68 dB (min) |
| Effective Number of Bits (10 MHz) | 10.9 Bits |
| Operating Temperature Range | -40°C to +85°C |
All National Semiconductor ADC12D040 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the output data format of the ADC12D040?
The device offers a choice of offset binary or 2's complement formats.
Can the output drivers be powered by a separate voltage?
Yes, the digital output driver power pins can be connected to a supply between 2.5V and the digital supply voltage.
What is the maximum clock frequency supported?
The maximum clock frequency is 55 MHz (minimum guaranteed 40 MHz).
