Key facts
- Brand
- Atmel
- Model
- AT22V10
- Category
- Other Electronics
- Documents
- 3
- Languages
- EN
- Last added
- 2012-06-11
Start here
Atmel AT22V10B Programmable Logic Device Datasheet
The AT22V10B is an ultra-high performance CMOS Programmable Logic Device (PLD) featuring speeds down to 7.5 ns and operation up to 166 MHz. It offers full compatibility with the standard 22V10, providing 12 dedicated inputs and ten configurable I/O pins to implement logic requiring up to 22 input signals. The device includes a variable product term architecture with eight to 16 product terms per output, along with synchronous preset and asynchronous reset capabilities.
Read onlineAtmel AT22V10 specifications
| Max Propagation Delay | 7.5 ns |
|---|---|
| Max Operation Frequency | 166 MHz |
| Operating Voltage | 5 V + 10% |
| Leakage Current | 10 uA |
| ESD Protection | 2000 V |
| Latch-Up Protection | 200 mA |
| Operating Temperature (Commercial) | 0°C to 70°C |
| Input High Voltage | 2.0 V |
All Atmel AT22V10 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
How to use the product for one specific task, with worked examples.
Questions answered in these manuals
What is the maximum operating frequency of the AT22V10B?
The device supports operation up to 166 MHz.
Is the AT22V10B compatible with the standard 22V10?
Yes, it is fully compatible with the standard 22V10 in terms of functionality and fuse-map.
What is the maximum propagation delay of the AT22V10/L?
The device has a maximum propagation delay of 15 ns.
What supply voltage does the AT22V10/L require?
It operates from a 5 V supply with a ±10 % tolerance.
What are the AC timing parameters used for Atmel PLDs?
Atmel PLDs use parameters such as tpp, tpps, tppg, top, tepe, and others to describe pin‑to‑pin, feedback, and combinatorial delays.
From: Atmel PLD Architectures Simplify Timing Calculation Application Note
Can the timing of Atmel PLDs be predicted without simulation tools?
Yes, because the devices have deterministic, path‑independent delays, the AC timing parameters allow hand calculation of delays in a few minutes.
From: Atmel PLD Architectures Simplify Timing Calculation Application Note