Atmel AT89C5130A-M Manuals

This document details the features of the 80C52X2 core, including maximum core frequency, dual data pointer, full-duplex enhanced UART, three 16-bit timers/counters, 256 bytes of scratchpad RAM, 16/32-Kbyte on-chip flash EEPROM, 3-Kbyte flash EEPROM for bootloader, 1-Kbyte EEPROM data, 1024 bytes of on-chip expanded RAM, integrated power monitor, USB 1.1 and 2.0 full-speed compliant module, endpoint 0 for control transfers, 6 programmable endpoints, 48 MHz PLL for full-speed bus operation, bus disconnection on microcontroller request, 5 channels programmable counter array (PCA) and programmable hardware watchdog timer

This document introduces the features of AT91SAM7S256A, including peripherals, communication and clock