Philips Manuals - Page 30

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Philips manuals, page 30

  • PHILIPS 74F1779 handbook

  • PHILIPS 74F1763 handbook

    This document describes the features and functions of the Philips Semiconductors 74F1763 Intelligent DRAM Controller (IDC), including DRAM signal timing generator, automatic refresh circuitry, selectable row address hold and RAS precharge times, etc. The controller is designed for controlling 1 MBit DRAMs and supports intelligent burst-mode refresh after page-mode access cycles. The document also introduces some improved features of the product, such as page-mode access, selectable RAS precharge time, and row-address hold time to fit different DRAMs.

  • PHILIPS 74F174 handbook

    The 74F174 is a hex D-type flip-flop with individual D inputs and Q outputs, produced by Philips Semiconductors. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop’s Q output. All Q outputs will be forced Low independent of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where true outputs only are required, and the Clock and Master Reset are common to all storage elements.

  • PHILIPS 74F173 handbook

    The 74F173 is a high speed 4-bit parallel load register with clock enable control, 3-state buffered outputs, and master reset (MR) function

  • PHILIPS 74F169 handbook

    The document describes the features and characteristics of the 74F169 4-bit up/down binary synchronous counter, including synchronous counting and loading, up/down counting, modulo 16 binary counter, two count enable inputs for n-bit cascading, positive edge-triggered clock, built-in carry look-ahead capability, and presettable for programmable operation.

  • PHILIPS 74F1604 handbook

    This document is the product specification for the 74F1604 Latch from Philips Semiconductors. The product features high impedance NPN base inputs, 16-bit wide data inputs, and multiplexed 8-bit outputs.

  • PHILIPS 74F154 handbook

    This document describes the features and characteristics of the 74F154 decoder/demultiplexer, including its 16-line demultiplexing capability, mutually exclusive outputs, and 2-input enable gate for strobing or expansion. The decoder accepts four active High binary address inputs and provides 16 mutually exclusive active Low outputs.

  • PHILIPS 74F153 handbook

    The 74F153 is a dual 4-input multiplexer that can select 2 bits of data from up to four sources selected by common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active-Low Enables (Ea, Eb) which can be used to strobe the outputs independently. Outputs (Ya, Yb) are forced Low when the corresponding Enables (Ea, Eb) are High. The 74F153 is the logic implementation of a 2-pole, 4-position switch where the switch is determined by the logic levels supplied to the common select inputs.

  • PHILIPS 74F151A handbook

    The 74F151A is an 8-input multiplexer with high speed, on-chip decoding, multifunctional capability, and complementary outputs. It can provide the ability to select from eight sources of data or control information in one package. The device can provide any logic function of four variables and the negation with correct manipulation.

  • PHILIPS 74F148 handbook

    The 74F148 8-input priority encoder is a Philips Semiconductors product with features such as code conversion, multi-channel D/A converter, decimal-to-BCD converter, cascading for priority encoding of “N” bits, input enable capability, priority encoding-automatic selection of highest priority input line, output enable-active Low when all inputs are High, group signal output-active when any input is Low.

  • PHILIPS 74F139 handbook

    This document describes the product specifications of the 74F139 Dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each accepting two binary weighted inputs and providing four mutually exclusive active-Low outputs. Each decoder has an active-Low Enable pin, which, when high, forces all outputs to be high. The device has multifunction capability.

  • PHILIPS 74F132 handbook

    This document describes the features and characteristics of the 74F132 Quad 2-input NAND Schmitt trigger. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals, and has greater noise margin than conventional NAND gates.

  • PHILIPS 74F145 handbook

    The 74F1245 is an octal transceiver featuring non-inverting 3-State bus compatible outputs in both transmit and receive directions. The B port outputs are capable of sinking 64mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The device features an Output Enable (OE) input for easy cascading and Transmit/Receive (T/R) input for direction control. The 3-State outputs, B0–B7, have been designed to prevent output bus loading if the power is removed from the device.

  • PHILIPS 74F1244 handbook

    74F1244 is an Octal buffer (3-State) produced by Philips Semiconductors. It is ideal for driving bus lines or buffer memory address registers. The outputs are capable of sinking 64mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The device features two Output Enables, OEa and OEb, each controlling four of the 3-State outputs. The 74F1244 is pin and functionally compatible with the 74F244. The lower power and light bus loading features make it an ideal part to interface directly with MOS microprocessors.

  • PHILIPS 74F1240 handbook

    The 74F1240/74F1241 are octal buffers that are ideal for driving bus lines or buffer memory address registers.