STMicroelectronics M54 Manuals

M54/M74HC192 is a synchronous up/down binary counter, M54/M74HC193 is a synchronous up/down decade counter, with high speed, low power consumption, high noise immunity, strong output drive capability, symmetrical output impedance, balanced propagation delay, wide operating voltage range, etc.

54/74HC292/7292 M54/74HC294/7294 are high speed CMOS PROGRAMMABLE DIVIDER/TIMER fabricated with silicon C2MOS technology.

M54/74HC279 is a high speed CMOS QUAD S-R LATCH fabricated in silicon gate C2MOS technology.

M54/74HC696/697 are high speed CMOS up/down counters fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The HC696/698 are BCD DECADE COUNTER, and the HC697/699 are 4-BIT BINARY COUNTER. Both devices have register. They count on the positive edge of the counterclock input (CCK) when selected by the ”Counter Mode”. If the input U/D is held ”H”, the internal counter counts up, and held ”L”, counts down. The internal counter’s outputs are stored in the output register at the positive edge of register clock (RCK). The counter

The M54/74HC620/623 are high speed CMOS OCTAL BUS TRANSCEIVERS fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation allows maximum flexibility in timing. These devices allow data transmission from the A bus to B bus or from the B to the A bus depending upon the logic levels at the enable inputs (GBA and GAB). The enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of GBA and GAB. Each output reinforces its input.