The M54/74HC620/623 are high speed CMOS OCTAL BUS TRANSCEIVERS fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation allows maximum flexibility in timing. These devices allow data transmission from the A bus to B bus or from the B to the A bus depending upon the logic levels at the enable inputs (GBA and GAB). The enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of GBA and GAB. Each output reinforces its input.
The M54/74HC620/623 are high‑speed CMOS octal bus transceivers offering low power consumption and wide operating voltage range. They support dual‑enable control for bidirectional data transfer between two 8‑bit buses and feature protection against static discharge.
The document provides electrical characteristics, absolute maximum ratings, recommended operating conditions, mechanical dimensions for plastic, ceramic and PLCG20 packages, and pin‑out descriptions.
| Typical propagation delay (tpp) | 10 ns |
|---|---|
| Operating voltage range (Vcc) | 2 V to 6 V |
| Output drive capability | 15 LSTTL loads |
The devices operate from 2 V to 6 V supply voltage.
Pins 1 and 19 (GBA, GAB) are the direction control inputs.
The supply voltage may not exceed –0.5 V to +7 V.