Philips manuals, page 84
PHILIPS 74HC/HCT541 Octal buffer/line driver; 3-state handbook
This document describes an octal buffer/line driver called 74HC/HCT541, which has 3-state outputs. Its features include non-inverting outputs, strong output capability, and belongs to the MSI category.
PHILIPS 74HC/HCT540 Octal buffer/line driver; 3-state; inverting handbook
This document is a datasheet for 74HC/HCT540, which describes the features and characteristics of the product, including output capability and operating current.
PHILIPS 74HC/HCT534 Octal D-type flip-flop; positive edge-trigger; 3-state; inverting handbook
The 74HC/HCT534 is a high-speed Si-gate CMOS device with 3-state inverting outputs for bus oriented applications. It is an 8-bit positive, edge-triggered register with a common 3-state output enable input, output capability of bus driver and ICC category of MSI.
PHILIPS 74HC/HCT4520 Dual 4-bit synchronous binary counter handbook
The 74HC/HCT4520 is a dual 4-bit synchronous binary counter with standard output capability and MSI ICC category. It is a high-speed Si-gate CMOS device and is pin compatible with the '4520' of the '4000B' series.
PHILIPS 74HC/HCT4515 4-to-16 line decoder/demultiplexer with input latches; inverting handbook
The 74HC/HCT4515 is a high-speed 4-to-16 line decoder/demultiplexer with input latches and inverting outputs.
PHILIPS 74HC/HCT4514 4-to-16 line decoder/demultiplexer with input latches handbook
The 74HC/HCT4514 is a 4-to-16 line decoder/demultiplexer with input latches, non-inverting outputs, standard output capability, and MSI ICC category.
PHILIPS 74HC/HCT4511 BCD to 7-segment latch/decoder/driver handbook(1)
74HC/HCT4511 is a high-speed BCD to 7-segment latch/decoder/driver with 10mA drive capability, can drive common cathode LED displays.
PHILIPS 74HC/HCT4353 Triple 2-channel analog multiplexer/demultiplexer with latch handbook
This document describes the features and characteristics of the 74HC/HCT4353 triple 2-channel analog multiplexer/demultiplexer, including wide analog input voltage range, low ON resistance, logic level translation, etc.
PHILIPS 74HC/HCT4351 8-channel analog multiplexer/demultiplexer with latch handbook
The document describes the features of the 74HC/HCT4351 8-channel analog multiplexer/demultiplexer, including wide analog input voltage range, low ON resistance, and logic level translation.
PHILIPS 74HC/HCT393 handbook
The 74HC/HCT393 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT393 are 4-bit binary ripple counters with separate clocks (1CP and 2 CP) and master reset (1MR and 2MR) inputs to each counter.
PHILIPS 74HC/HCT4002 handbook
74HC/HCT4002 are high-speed Si-gate CMOS devices and are pin compatible with “4002” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4002 provide the 4-input NOR function.
PHILIPS 74HC/HCT40105 handbook
The 74HC/HCT40105 4-bit x 16-word FIFO register is a high-speed Si-gate CMOS device and is pin compatible with the 40105 of the 4000B series. It can store sixteen 4-bit words and is capable of handling input and output data at different shifting rates. This feature makes it particularly useful as a buffer between asynchronous systems.
PHILIPS 74HC/HCT4015 Dual 4-bit serial-in/parallel-out shift register handbook
The document describes the features and characteristics of the 74HC/HCT4015 dual 4-bit serial-in/parallel-out shift register.
PHILIPS 74HC/HCT4017 Johnson decade counter with 10 decoded outputs handbook
74HC/HCT4017 are high-speed Si-gate CMOS devices and are pin compatible with the “4017” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4017 are 5-stage Johnson decade counters with 10 decoded active HIGH outputs (Q0 to Q9), an active LOW output from the most significant flip-flop (Q5-9), active HIGH and active LOW clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). When cascading counters, the Q5-9 output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive the CP0 input of the next counter. A HIGH on MR resets the counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0 and CP1). Automat
PHILIPS 74HC/HCT4020 14-stage binary ripple counter handbook
This document describes the features and characteristics of the 74HC/HCT4020 14-stage binary ripple counter. It has standard output capability and is suitable for MSI category. The counter has a clock input, an overriding asynchronous master reset input, and twelve fully buffered parallel outputs. The counter advances on the HIGH-to-LOW transition of the clock input. When the master reset input is HIGH, all counter stages are cleared and all outputs are forced LOW, regardless of the state of the clock input. Each counter stage is a static toggle flip-flop.