The K4S56163PF is a 268,435,456-bit synchronous high-data-rate dynamic random-access memory organized as 4 x 4,196,304 words by 16 bits, fabricated with Samsung's high-performance CMOS technology. Precise cycle control is allowed with the use of the system clock and I/O transactions are possible on every clock cycle due to the synchronous design. The same device can be used in a variety of high-bandwidth and high-performance memory system applications due to the range of operating frequencies, programmable burst lengths, and programmable latencies.
The K4S56163PF R(B)G/F is a 4M × 16‑bit mobile SDRAM offered in a 54‑ball FBGA package. It supports 1.8 V LVCMOS operation, multiple CAS latencies (1‑3), burst lengths up to full page, and features such as Partial Array Self‑Refresh (PASR) and internal Temperature‑Compensated Self‑Refresh (TCSR). The device is available in low‑power commercial (‑25 °C ~ 70 °C) and extended (‑25 °C ~ 85 °C) temperature grades.
The datasheet provides absolute maximum ratings, recommended DC and AC operating conditions, timing parameters, and power‑up and burst sequences. It also lists ordering information, package pinout, and detailed electrical characteristics for designers integrating the part into high‑performance memory systems.
| Maximum operating frequency (CL3) | 133 MHz |
|---|---|
| Maximum operating frequency (CL2) | 883 MHz |
| Supply voltage (Vop) typical | 1.8 V |
| Power dissipation (Pp) | 1.0 W |
| Refresh period | 64 ms |
| CAS latency options | 1, 2, 3 |
The typical supply voltage (Vop) is 1.8 V, with a range from 1.7 V to 1.95 V.
The device uses a 64 ms refresh period.