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- Model
- DP83848I
- Industry
- Industrial
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- 2
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- Last added
- 2012-05-09
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National Semiconductor DP83848I Ethernet PHY Datasheet
The DP83848I PHYTER is a robust, fully‑featured 10/100 Mbps single‑port Ethernet physical layer device. It offers low power consumption with several intelligent power‑down states and includes a 25 MHz clock output, reducing the need for external components. The device supports both MII and RMII interfaces, Auto‑MDIX, and complies with IEEE 802.3u specifications.
It is supplied in a compact 48‑pin LQFP (7 mm × 7 mm) package and provides extensive register access for configuration, status monitoring, and built‑in self‑test functions. The datasheet includes pin descriptions, functional block diagrams, electrical specifications, and design guidelines for industrial and embedded applications.
National Semiconductor DP83848I specifications
| Typical low power consumption | < 270 mW |
|---|---|
| Clock output | 25 MHz |
| Package type | 48‑pin LQFP (7 mm × 7 mm) |
| Supply voltage | 3.3 V |
| Auto‑MDIX support | Yes |
Source: National Semiconductor DP83848I Ethernet PHY Datasheet
All National Semiconductor DP83848I documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the typical power consumption of the DP83848I?
The DP83848I typically consumes less than 270 mW of power.
From: National Semiconductor DP83848I Ethernet PHY Datasheet
What package does the DP83848I use?
It is offered in a 48‑pin LQFP package measuring 7 mm × 7 mm.
From: National Semiconductor DP83848I Ethernet PHY Datasheet
What clock output does the DP83848I provide?
The DP83848I provides a 25 MHz clock output.
From: National Semiconductor DP83848I Ethernet PHY Datasheet
What is the typical power consumption of the DP83848I?
Typical power consumption is less than 270 mW.
From: National Semiconductor DP83848I Ethernet PHY Datasheet