Key facts
- Brand
- Analog Devices
- Model
- ADSP-BF561
- Industry
- Industrial
- Documents
- 17
- Languages
- EN
- Last added
- 2012-08-03
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Analog Devices ADSP-BF561 Blackfin Processor Hardware Reference Manual
This document serves as the Hardware Reference Manual for the ADSP-BF561 Blackfin processor. It provides comprehensive technical information regarding the processor's core architecture, memory organization, and peripheral interfaces, intended for developers and designers working with this device.
The manual covers the processor's computational units, including the Arithmetic Logic Unit (ALU), Multipliers, and Barrel Shifter, along with detailed descriptions of data formats and instruction sets. It also outlines various operating modes and states, such as User Mode, Supervisor Mode, and different power-saving states like Sleep and Hibernate.
Analog Devices ADSP-BF561 specifications
| Processor | ADSP-BF561 |
|---|---|
| Clock Frequency | 30 MHz |
| SDRAM Capacity | 64 MB |
| Flash Memory Capacity | 8 MB |
| Audio Codec | AD1836A |
| Video Decoder | ADV7183A |
| Video Encoder | ADV7179 |
| Power Supply | 7.5V DC @ 3Amps |
Source: Analog Devices ADSP-BF561 EZ-KIT Lite Evaluation System Manual
All Analog Devices ADSP-BF561 documents by type
Day-to-day operation, settings and troubleshooting. Start here if the product is already set up.
- Analog Devices ADSP-BF561 EZ-KIT Lite Evaluation System Manual 94 p
- Analog Devices ADSP-BF561 EZ-KIT Lite Evaluation System Manual 87 p
- Analog Devices ADSP-BF561 EZ-KIT Lite Evaluation System User Manual 86 p
- Analog Devices ADSP-BF561 EZ-KIT Lite Evaluation System Manual 120 p
- Analog Devices ADSP-BF561 EZ-KIT Lite Evaluation System Manual 88 p
- Analog Devices ADSP-BF561 Blackfin Processor Hardware Reference Manual 918 p
- Analog Devices ADSP-BF561 Handbook 64 p
Ratings, dimensions and ordering codes, for selection and design work.
How to use the product for one specific task, with worked examples.
- Analog Devices EE-258 Interfacing Micron MT9V022 Image Sensors to Blackfin Processors Application Note 18 p
- Analog Devices ADSP-BF561 TFT-LCD Controller Application Note 10 p
- Analog Devices Video Framework Considerations for Image Processing on Blackfin Processors EE-276 6 p
- Analog Devices ADSP-BF561 Managing Multiple DXEs Application Note 11 p
- Analog Devices ADSP-BF561 PCM Interface Emulation Application Note 5 p
- Analog Devices Blackfin Processor Boot Compression/Decompression Algorithm Application Note 7 p
- Analog Devices ADSP-BF561 Blackfin Processor Power Estimation Application Note 13 p
Questions answered in these manuals
Which Blackfin processor is used for the example system?
The system was tested on the ADSP-BF561 processor.
Does this note apply to other Blackfin processors?
Yes, it applies to other Blackfin processors with PPI because their interface is fully compatible.
What hardware boards and display kit are used in this application?
The implementation uses an ADSP-BF561 EZ-KIT Lite board, a Logic Product Development Zoom Display Kit with a Sharp LQ035Q7DB02 LCD Panel, and a DVD player as the video input source.
From: Analog Devices ADSP-BF561 TFT-LCD Controller Application Note
How many lines make up a frame for the PPI configuration?
The value programmed in the Frame register is 525 to match the actual received lines.
From: Analog Devices ADSP-BF561 TFT-LCD Controller Application Note
Which processor models does this application note cover?
This document provides considerations for the ADSP-BF533 and ADSP-BF561 Blackfin family processors.
From: Analog Devices Video Framework Considerations for Image Processing on Blackfin Processors EE-276
What is the size of each subsection in the L1 data SRAM?
Each subsection in the L1 data SRAM consists of 4 Kbytes of memory.
From: Analog Devices Video Framework Considerations for Image Processing on Blackfin Processors EE-276