Analog Devices ADSP-BF561 Blackfin Processor Power Estimation Application Note

About this manual

This document provides a methodology for estimating the total average power consumption of the ADSP-BF561 Blackfin embedded symmetric multiprocessor. The power estimates are derived from characterization data measured across power supply voltage, core frequency (CCLK), and junction temperature (TJ). The primary goal is to assist board designers in calculating power budgets for power supply and thermal relief designs.

The note details the calculation of internal power consumption, which consists of static and dynamic components. It defines specific activity vectors (such as IDLE, NOP, TYP, and PEAK) and provides scaling factors to estimate dynamic current based on application profiles. Additionally, it covers the estimation of static current in Deep Sleep mode, which depends on junction temperature and voltage but not frequency.

What's inside

• Introduction
• Estimating Internal Power Consumption
• Internal Power Vector Definitions
• Estimating IDDINT Dynamic Current
• Estimating IDDINT Static Current
• Deep Sleep Mode
• Power Vector Activity Scaling Factor

Frequently asked questions

What is the purpose of the ADSP-BF561 processor's dynamic power management control?

It allows the regulation of the applied core voltage (VDDINT) from an external I/O source (VDDEXT).

What is the total power consumption of the ADSP-BF561 processor calculated as?

It is the sum of the power consumed for both of the power supply domains, VDDINT and VDDEXT.

What is the baseline dynamic current for the VDDINT supply when VDDINT is at 1.2 V and CCLK is at 400 MHz?

The corresponding IDD-BASELINE-DYN for the VDDINT power supply domain would be approximately 340 mA.