This application note discusses how to emulate the PCM interface using four programmable flag pins (GPIOs) of the ADSP-BF561 Blackfin® processor. This application note applies to designs in which all of the serial interfaces present on the devices are in use and hence the need for emulation of the PCM interface arises.
The document describes a method to emulate a Pulse Code Modulation (PCM) interface on the ADSP-BF561 Blackfin processor using four programmable flag pins (GPIOs). This solution is intended for designs where all standard serial interfaces are already in use. The emulation supports both transmit and receive operations by utilizing the Serial Port (SPORT) and the flag pins (PF9, PF10, PF11, PF12) to generate clocks, frame syncs, and data signals.
The implementation uses PF9, PF10, PF11, and PF12.
The core timer generates an interrupt at a rate twice that of the desired clock rate.
The interrupt for the timer should be generated at 16 kHz.