Analog Devices AD9215 Manuals

We have 5 manuals for the Analog Devices AD9215: 5 Datasheets. Free to view online or download as PDF.

Analog Devices AD9215 manuals

ANALOG DEVICES 10-Bit 65/80/105 MSPS 3 V A/D Converter AD9215 handbook

Datasheet

The AD9215 is a 10-bit, 65/80/105 MSPS, 3 V A/D converter from Analog Devices. It features single 3 V supply operation, SNR = 58 dBc (to Nyquist), SFDR = 77 dBc (to Nyquist), low power ADC core, differential input, 300 MHz bandwidth, On-chip reference and sample-and-hold amplifier, DNL = ±0.25 LSB, flexible analog input, offset binary or twos complement data format, clock duty cycle stabilizer, and is used in ultrasound equipment, IF sampling in communications receivers, battery-powered instruments, hand-held scopemeters, and low cost digital oscilloscopes.

ANALOG DEVICES 10-Bit 65/80/105 MSPS 3 V A/D Converter AD9215 handbook(1)

Datasheet

This document describes the features and characteristics of the AD9215, a 10-bit, 65/80/105 MSPS, 3V A/D converter from Analog Devices. The product operates on a single 3V supply and features a SNR of 58 dBc, SFDR of 77 dBc, and a low power ADC core. It is suitable for applications such as ultrasound equipment, IF sampling in communications receivers, battery-powered instruments, and low-cost digital oscilloscopes.

ANALOG DEVICES 10-Bit 65/80/105 MSPS 3 V A/D Converter AD9215 handbook(1)(1)

Datasheet

AD9215 is a 10-bit, 65/80/105 MSPS, 3V A/D converter manufactured by Analog Devices. It features single 3V operation, SNR = 58 dBc, SFDR = 77 dBc, low power ADC core, differential input, 300 MHz bandwidth, on-chip reference and sample-and-hold amplifier, DNL = ±0.25 LSB, flexible analog input, offset binary or twos complement data format, clock duty cycle stabilizer, and other features.

ANALOG DEVICES AD9215 handbook

Datasheet

The AD9215 is a 10-bit, 65/80/105 MSPS, 3 V A/D converter that features single 3 V supply operation, SNR = 58 dBc (to Nyquist), SFDR = 77 dBc (to Nyquist), low power ADC core, differential input, 300 MHz bandwidth, on-chip reference and sample-and-hold amplifier, DNL = ±0.25 LSB, flexible analog input (1 V p-p to 2 V p-p range), offset binary or twos complement data format, clock duty cycle stabilizer, and more.