ALTERA Cyclone FPGA Family handbook

Update: 29 September, 2023

The CycloneTM field programmable gate array family is based on a 1.5-V, 0.13-µm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. It features PLLs for clocking and a dedicated DDR interface for memory requirements. Cyclone devices are cost-effective for data-path applications and support various I/O standards including LVDS and PCI. Low-cost serial configuration devices are available for configuring Cyclone devices.

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File format: PDF

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MD5 Checksum: 72F743560FECF615C69AA9AC2B85E5C0

Publication date: 03 August, 2012

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PDF Link: ALTERA Cyclone FPGA Family handbook PDF