The CDC318 is a high-performance clock buffer that distributes one input (A) to 18 outputs (Y) with minimum skew for clock distribution. The CDC318 operates from a 3.3-V power supply, and is characterized for operation from 0°C to 70°C. The device provides a standard mode (100K-bits/s) I2C serial interface for device control. The implementation is as a slave/receiver. The device address is specified in the I2C device address table. Both of the I2C inputs (SDATA and SCLOCK) provide integrated pullup resistors (typically 140 kΩ) and are 5-V tolerant. Three 8-bit I2C registers provide individual enable control for each of the outputs. All outputs default to enabled at powerup. Each output can be placed in a disabled mode with a low-level output when a low-level control bit is written to the control register.
The CDC318 is a high-performance clock buffer that distributes one input to 18 outputs with minimum skew, designed for synchronous DRAM (SDRAM) clock buffering applications. It operates from a 3.3-V power supply and is characterized for operation from 0°C to 70°C. The device features a standard mode I2C serial interface for device control, allowing individual enable control for each output via three 8-bit registers.
| Supply Voltage | 3.3 V |
|---|---|
| Operating Temperature | 0°C to 70°C |
| Output Skew | Less than 250 ps |
| Pulse Skew | Less than 650 ps |
| ESD Protection | Exceeds 2000 V |
The device is characterized for operation from 0°C to 70°C.
The CDC318 distributes one input to 18 outputs.
The device operates from a 3.3-V power supply.