The CDC304 is a circuit with 8 flip-flops designed to have low skew between outputs. It has a maximum output skew of 1ns and maximum pulse skew of 1.5ns. The product features TTL-compatible inputs and outputs, and utilizes center-pin VCC and GND configurations to minimize high-speed switching noise. It is suitable for clock drivers where a divide-by-two function is required.
The CDC304 is an integrated circuit containing eight flip-flops designed to provide a divide-by-two function with low output skew. It features toggle outputs that switch on successive clock pulses and includes independent Preset (PRE) and Clear (CLR) inputs for setting Q outputs high or low regardless of the clock state.
The device is characterized for operation from 0°C to 70°C and supports supply voltages ranging from 4.5V to 5.5V. It offers package options including Plastic Small-Outline (D) and Standard Plastic (N) DIPs, with a maximum output skew of 1 ns.
| Operating Temperature Range | 0°C to 70°C |
|---|---|
| Maximum Clock Frequency (fCLK) | 80 MHz |
| High-Level Output Current (IOH) | -24 mA |
| Low-Level Output Current (IOL) | 48 mA |
| Maximum Output Skew | 1 ns |
It contains eight flip-flops designed to toggle on successive clock pulses, providing a divide-by-two function with low skew between outputs.
Preset (PRE) and clear (CLR) inputs allow setting Q outputs high or low independently of the clock input.