The MAX1209 is a 3.3V, 12-bit, 80Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single-ended or differential signals. The MAX1209 is optimized for low power, small size, and high dynamic performance. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX1209 ideal for intermediate-frequency (IF) sampling applications. Powered from a single 3.0V to 3.6V supply, the MAX1209 consumes only 366mW while delivering a typical signal-to-noise (SNR) performance of 66.5dB at an input frequency of 175MHz. In addition to low operating power, the MAX1209 features a 3µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX1209 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX1209 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX1209 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer (DCE). ADC conversion results are available through a 12-bit, parallel, CMOS-compatible output interface.
The MAX1209 is a 3.3 V, 12‑bit, 80 Msps analog‑to‑digital converter optimized for low power, small size, and high dynamic performance. It accepts single‑ended or differential signals and is suited for IF‑sampling applications such as microwave receivers, ultrasound imaging, and low‑power data acquisition.
Key features include a fully differential track‑and‑hold input, selectable internal or external reference, CMOS‑compatible parallel output (two’s‑complement or Gray code), and a 40‑pin thin QFN package (6 mm × 6 mm × 0.8 mm). The device operates from 3.0 V to 3.6 V, consumes 366 mW in single‑ended mode, and offers a 3 µW power‑down mode.
| Resolution | 12 bits |
|---|---|
| Maximum Sampling Rate | 80 Msps |
| Supply Voltage (Analog) | 3.0 V to 3.6 V |
| Power Consumption (single‑ended) | 366 mW |
| Power‑down Current | 3 µW |
| Full‑Scale Input Range | +0.35 V to +1.15 V |
| Package | 40‑pin thin QFN 6 mm × 6 mm × 0.8 mm |
The maximum clock frequency is 80 MHz.
It consumes 366 mW in single‑ended clock mode.
The device draws only 3 µW in power‑down mode.
It is available in a 40‑pin thin QFN package measuring 6 mm × 6 mm × 0.8 mm.