Maxim MAX1123 10‑Bit 210Msps ADC with LVDS Outputs Handbook

The MAX1123 is a monolithic 10-bit, 210Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies up to 500MHz. The product operates with conversion rates of up to 210Msps while consuming only 460mW. At 210Msps and an input frequency of 100MHz, the MAX1123 achieves a spurious-free dynamic range (SFDR) of 74.5dBc. Its excellent signal-to-noise ratio (SNR) of 57.4dB at 10MHz remains flat (within 1.5dB) for input tones up to 500MHz. This makes the MAX1123 ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems. The MAX1123 requires a single 1.8V supply. The analog input is designed for either differential or single- ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 420MHz. This helps to reduce the phase noise of the input clock source. A differential LVDS sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible, and the data format can be selected to be either two’s complement or offset binary. The MAX1123 is available in a 68-pin QFN with exposed pad (EP) and is specified over the industrial (-40°C to +85°C) temperature range. For pin-compatible, lower and higher speed versions of the MAX1123, refer to the MAX1122 (170Msps) and the MAX1124 (250Msps) data sheets. For a higher speed version, refer to the MAX1125 (350Msps) data sheet.


Maxim MAX1123 10‑Bit 210Msps ADC with LVDS Outputs Handbook - cover page
Brand
Maxim
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
17
File format
PDF
File size
254 KB
Published
07 May, 2012
Updated
30 September, 2023
MD5 checksum
E881230C36BACE65361DC7800ACD1868

About this manual

The MAX1123 is a monolithic 10‑bit, 210 Msps analog‑to‑digital converter optimized for high‑frequency performance up to 500 MHz. It operates from a single 1.8 V supply, consumes 460 mW at full speed, and provides LVDS‑compatible digital outputs with selectable two’s complement or offset‑binary formats.

Key specifications include a 210 Msps conversion rate, SNR of 57.4 dB at 10 MHz, SFDR of 74.5 dBc at 100 MHz, and a 68‑pin QFN package. The device is suited for wideband wireless, radar, and high‑speed communication systems.

What's inside

  • General Description
  • Absolute Maximum Ratings
  • Electrical Characteristics
  • Pin Description
  • Detailed Description—Theory of Operation
  • Clock‑Divider Control
  • Performance Graphs
  • Reference Architecture

Specifications

Conversion Rate210 Msps
Supply Voltage1.8 V
Power Dissipation460 mW at 210 Msps
Package68‑pin QFN with exposed pad

Frequently asked questions

What supply voltage does the MAX1123 require?

The MAX1123 operates from a single 1.8 V supply.

What is the maximum sampling rate of the MAX1123?

It can sample at up to 210 Msps.

How many pins does the MAX1123 package have?

The MAX1123 is available in a 68‑pin QFN package with an exposed pad.

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