Maxim MAX12527 Dual 12‑Bit ADC Datasheet

The MAX12527 is a low-power, small-size, 12-bit ADC from MAXIM that features fully differential wideband track-and-hold (T/H) inputs, driving internal quantizers. The MAX12527 is optimized for low power, small size, and high dynamic performance in intermediate frequency (IF) and baseband sampling applications. This dual ADC operates from a single 3.3V supply, consuming only 620mW while delivering a typical 69.8dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. The T/H input stages accept single-ended or differential inputs up to 400MHz. In addition to low operating power, the MAX12527 features a 166µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX12527 to use the internal 2.048V bandgap reference or accept an externally applied reference and allows the reference to be shared between the two ADCs. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX12527 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX12527 supports either a single-ended or differential input clock. User-selectable divide-by-two (DIV2) and divide-by-four (DIV4) modes allow for design flexibility and help eliminate the negative effects of clock jitter. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer (DCE).


Maxim MAX12527 Dual 12‑Bit ADC Datasheet - cover page
Brand
Maxim
Category
AD CONVERTER
Document type
Datasheet
Language
English
Pages
28
File format
PDF
File size
649 KB
Published
07 May, 2012
Updated
30 September, 2023
MD5 checksum
539667F80038FA8D2603BE80D1375A59

About this manual

The MAX12527 is a dual 3.3 V, 12‑bit analog‑to‑digital converter optimized for low power, small size, and high dynamic performance in IF and baseband sampling applications. It operates from a single 3.3 V supply, consuming 620 mW in normal mode and offering up to 69.8 dB SNR at 175 MHz input frequency. The device features fully differential wide‑band track‑and‑hold inputs, selectable single‑ended or differential clocking, and user‑selectable DIV2/DIV4 clock division.

The ADC is supplied in a 68‑pin thin QFN (10 mm × 10 mm × 0.8 mm) package with an exposed paddle for low‑inductance grounding. It supports internal or external 2.048 V reference, CMOS‑compatible digital outputs (1.7‑3.6 V), and includes power‑down mode, out‑of‑range and data‑valid indicators. The datasheet provides extensive electrical characteristics, timing specifications, and layout recommendations for high‑speed operation.

What's inside

  • General Description
  • Absolute Maximum Ratings
  • Electrical Characteristics
  • Parameter Specifications
  • Timing Characteristics
  • Power Requirements
  • Reference Architecture
  • Layout Recommendations
  • Performance Graphs

Specifications

Supply Voltage (VDD)3.3 V
Digital Output Supply (OVDD)1.7‑3.6 V
Resolution12 bits
Maximum Sampling Rate65 Msps
Input Bandwidth400 MHz
Power‑Down Current0.05 mA
Package68‑pin thin QFN 10 mm × 10 mm × 0.8 mm
Operating Temperature Range-40 °C to +85 °C

Frequently asked questions

What is the maximum sampling rate of the MAX12527?

The MAX12527 can sample at up to 65 Msps.

What supply voltage does the MAX12527 require?

It operates from a 3.3 V analog supply (VDD).

What is the current draw in power‑down mode?

The power‑down mode current is approximately 0.05 mA.

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